Inverted Page Table
An Inverted Page Table is a memory-management structure used in virtual memory systems to translate virtual addresses into physical addresses more space-efficiently than a traditional per-process page table.2 Instead of keeping a separate page table for every process, the system maintains one global table with exactly one entry for each physical frame in RAM.2 This design is especially valuable when address spaces are large, because conventional page tables may consume substantial memory even for pages that are not currently resident in main memory.2
In short-note form, the key idea is simple: a normal page table maps virtual page physical frame, whereas an inverted page table stores entries indexed by physical frame, and each entry records which process and which virtual page currently occupy that frame.2 Because multiple processes may use the same virtual page number, entries usually include a PID or address-space identifier, together with control bits such as valid, dirty, reference, and protection bits.2
A conceptual view is shown below.2
The structure reduces page-table memory overhead because the number of entries is proportional to the number of physical frames, not to the size of each process's virtual address space.2 However, lookup is less direct: the virtual page number cannot be used as a simple array index, so systems often rely on hashing and the TLB to make translation practical.3
Footnotes
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Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩ ↩2 ↩3 ↩4 ↩5 ↩6
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Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩ ↩2 ↩3 ↩4 ↩5
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Operating Systems Lecture Notes Lecture 10 Issues in Paging and Virtual Memory - Lecture notes explaining inverted page tables as mappings only for resident physical pages. ↩ ↩2
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Appendix L: Advanced Concepts on Address Translation - Discussion of address-translation structures, including inverted and hashed page tables, and their design trade-offs. ↩ ↩2
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Faster Translations (TLBs) - OSTEP - Explains TLBs, translation caching, and fields such as ASID and protection bits relevant to paging. ↩ ↩2
Inverted Paging | Memory Management | Operating System
Core Examination Note
An inverted page table has one entry per physical frame, not one entry per virtual page.2 This is the most important defining point.
Footnotes
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Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
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Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩
Structure and fields of an inverted page table
Each entry in an inverted page table corresponds to one frame in main memory and typically stores the following information:2
| Field | Purpose |
|---|---|
| Physical frame index | Identifies the RAM frame represented by the entry |
| Virtual page number (VPN) | Tells which virtual page is loaded in that frame2 |
| Process ID / ASID | Distinguishes identical VPNs belonging to different processes2 |
| Control bits | Valid, dirty, referenced, protection, lock, and similar status bits2 |
| Chain / hash link | Helps resolve collisions when hashed lookup is used2 |
Because the table is organized by physical frames, the number of entries is:
For example, if physical memory is and page size is , then the number of entries is:
Thus, the table grows with RAM size rather than with the potentially enormous virtual address spaces of all running processes.2 This is why the design is attractive on systems with large address spaces, including some architectures such as PowerPC, UltraSPARC, and IA-64.
Footnotes
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Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩ ↩2 ↩3 ↩4 ↩5
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Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩ ↩2 ↩3 ↩4 ↩5 ↩6
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Faster Translations (TLBs) - OSTEP - Explains TLBs, translation caching, and fields such as ASID and protection bits relevant to paging. ↩ ↩2
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Operating Systems Lecture Notes Lecture 10 Issues in Paging and Virtual Memory - Lecture notes explaining inverted page tables as mappings only for resident physical pages. ↩
How address translation works with an inverted page table
- 1Step 1
The CPU-generated virtual address is divided into a virtual page number and an offset.2
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
Faster Translations (TLBs) - OSTEP - Explains TLBs, translation caching, and fields such as ASID and protection bits relevant to paging. ↩
-
- 2Step 2
The memory-management unit consults the TLB because recent translations are cached there; on a hit, the frame number is obtained immediately.2
Footnotes
-
Appendix L: Advanced Concepts on Address Translation - Discussion of address-translation structures, including inverted and hashed page tables, and their design trade-offs. ↩
-
Faster Translations (TLBs) - OSTEP - Explains TLBs, translation caching, and fields such as ASID and protection bits relevant to paging. ↩
-
- 3Step 3
On a TLB miss, the system uses the combination of process identifier and virtual page number as the search key, since the same virtual page number may appear in different processes.2
Footnotes
-
Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩
-
Faster Translations (TLBs) - OSTEP - Explains TLBs, translation caching, and fields such as ASID and protection bits relevant to paging. ↩
-
- 4Step 4
The IPT is searched, often through hashing or chained entries, to find the frame whose entry matches the given process and page.2
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩
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- 5Step 5
Once the physical frame is found, the original offset is appended to form the physical address.
Footnotes
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Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
- 6Step 6
If no matching entry exists, the operating system treats the reference as a miss in resident mappings and may trigger page-fault handling to bring the page into memory.2
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
Operating Systems Lecture Notes Lecture 10 Issues in Paging and Virtual Memory - Lecture notes explaining inverted page tables as mappings only for resident physical pages. ↩
-
Why inverted page tables are used
The primary motivation is memory efficiency.2 In a traditional single-level page-table design, every process needs its own table, and the size of that table depends on the virtual address space, even if many pages are unused.2 In contrast, the inverted approach stores only mappings for pages that are actually resident in physical memory.2
This difference becomes significant for large address spaces. If a machine supports many processes with large virtual memories, maintaining per-process linear page tables can waste a considerable amount of memory just for bookkeeping. An inverted page table avoids that by replacing many large tables with one compact, global structure.2
Another useful perspective is:
- Traditional page table: indexed by VPN, easy lookup, but potentially very large.2
- Inverted page table: indexed conceptually by physical frame, compact in memory, but lookup is more complex.2
This makes the IPT a classic design trade-off between space and lookup simplicity.2
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩ ↩2 ↩3 ↩4 ↩5 ↩6
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Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩ ↩2 ↩3
-
Operating Systems Lecture Notes Lecture 10 Issues in Paging and Virtual Memory - Lecture notes explaining inverted page tables as mappings only for resident physical pages. ↩ ↩2 ↩3 ↩4
-
Appendix L: Advanced Concepts on Address Translation - Discussion of address-translation structures, including inverted and hashed page tables, and their design trade-offs. ↩ ↩2
Conceptual comparison: Traditional vs Inverted Page Table
Relative comparison of memory overhead and lookup complexity.3
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩
-
Operating Systems Lecture Notes Lecture 10 Issues in Paging and Virtual Memory - Lecture notes explaining inverted page tables as mappings only for resident physical pages. ↩
Important Limitation
An inverted page table saves memory, but address translation is usually slower on a raw lookup because the virtual page number is not a direct array index.2 This is why hashing and TLB support are important.
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩
Advantages and disadvantages
| Property | Description |
|---|---|
| Organization | Usually one table per process2 |
| Indexed by | Virtual page number |
| Size depends on | Virtual address space2 |
| Major strength | Direct lookup |
| Major weakness | Large memory requirement |
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩ ↩2
-
Appendix L: Advanced Concepts on Address Translation - Discussion of address-translation structures, including inverted and hashed page tables, and their design trade-offs. ↩ ↩2
-
Operating Systems Lecture Notes Lecture 10 Issues in Paging and Virtual Memory - Lecture notes explaining inverted page tables as mappings only for resident physical pages. ↩
Address-translation path with an inverted page table
CPU generates virtual address
Stage 1The processor issues a virtual address containing a virtual page number and offset.2"
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
Faster Translations (TLBs) - OSTEP - Explains TLBs, translation caching, and fields such as ASID and protection bits relevant to paging. ↩
TLB lookup
Stage 2If a cached translation exists, the frame number is returned immediately.2"
Footnotes
-
Appendix L: Advanced Concepts on Address Translation - Discussion of address-translation structures, including inverted and hashed page tables, and their design trade-offs. ↩
-
Faster Translations (TLBs) - OSTEP - Explains TLBs, translation caching, and fields such as ASID and protection bits relevant to paging. ↩
IPT search
Stage 3On a TLB miss, the system searches the inverted page table using the process identifier and virtual page number.2"
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩
Frame identified
Stage 4The matching IPT entry reveals the physical frame currently holding that virtual page."
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
Physical address formed
Stage 5The frame number is combined with the unchanged offset to produce the physical address."
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
Fault handling if absent
Stage 6If no mapping is found among resident pages, the operating system handles the miss or page fault.2"
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩
-
Operating Systems Lecture Notes Lecture 10 Issues in Paging and Virtual Memory - Lecture notes explaining inverted page tables as mappings only for resident physical pages. ↩
Short note for exam writing
An Inverted Page Table is a system-wide paging structure used in operating systems with virtual memory.2 Unlike a conventional page table, which keeps one entry for each virtual page of each process, an inverted page table keeps one entry for each physical frame in memory. Each entry usually stores the virtual page number, the corresponding process identifier, and control bits such as valid, dirty, and protection bits.2
Its chief advantage is that it greatly reduces the memory required for page tables, especially in systems with large virtual address spaces.2 However, the main drawback is slower lookup, because translation requires searching the table using PID and VPN rather than direct indexing; therefore hashing and TLBs are commonly used to improve performance.3 Inverted page tables have been used in architectures such as PowerPC, UltraSPARC, and IA-64.
A compact memory relation is:
whereas for conventional paging:
Hence, an inverted page table is best described as a space-saving paging technique with more complex address translation.2
Footnotes
-
Page table - Wikipedia - Overview of page tables, including inverted page tables, structure, and lookup trade-offs. ↩ ↩2 ↩3 ↩4 ↩5
-
Inverted Page Table - GeeksforGeeks - Notes on definition, fields, advantages, disadvantages, and example architectures. ↩ ↩2 ↩3 ↩4
-
Faster Translations (TLBs) - OSTEP - Explains TLBs, translation caching, and fields such as ASID and protection bits relevant to paging. ↩ ↩2
-
Operating Systems Lecture Notes Lecture 10 Issues in Paging and Virtual Memory - Lecture notes explaining inverted page tables as mappings only for resident physical pages. ↩ ↩2
Knowledge Check
What is the defining property of an inverted page table?
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