CoursifyCoursify

Various Addressing Modes of 8051 Microcontroller

Various Addressing Modes of 8051 Microcontroller

Verified Sources
May 21, 2026

The 8051 microcontroller supports multiple addressing modes so that instructions can access registers, internal RAM, special function registers, and program memory efficiently. In short notes, addressing modes describe how the operand is identified rather than what operation is performed.2

For the 8051, the most commonly taught data-access modes are immediate, register, direct, register indirect, and indexed.2 In a broader instruction-set view, the architecture also uses relative, absolute, and long addressing for branch instructions. Understanding these modes is essential because the same mnemonic such as MOV behaves differently depending on how the operand is addressed.

A useful way to classify them is shown below:

In assembly notation, symbols often indicate the addressing style:

  • #data → immediate operand
  • Rn → register operand
  • direct → direct byte address
  • @R0, @R1, @DPTR → indirect operand
  • @A+DPTR, @A+PC → indexed access to code memory2

Footnotes

  1. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩ ↩2 ↩3

  2. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩ ↩2 ↩3

  3. [PDF] UNIT – 4 8051 MICROCONTROLLER Architecture - WordPress.com - Academic notes summarizing the main five 8051 addressing modes and examples. ↩

  4. Addressing modes of 8051 - TutorialsPoint - Provides concise descriptions and sample instructions for core 8051 addressing modes. ↩

Addressing Modes of 8051 Microcontroller: Immediate, Register, Direct, Indirect, and Indexed

Exam-Oriented View

In many university short-note questions, the expected core modes are immediate, register, direct, register indirect, and indexed. Some advanced notes also include relative, absolute, and long modes for branching.2

Footnotes

  1. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

  2. [PDF] UNIT – 4 8051 MICROCONTROLLER Architecture - WordPress.com - Academic notes summarizing the main five 8051 addressing modes and examples. ↩

1. Immediate Addressing Mode

In immediate addressing, the data is supplied directly inside the instruction. The operand is preceded by the # symbol, indicating that the given value is a constant and not a memory address.2

Examples:

1MOV A, #25H
2MOV R3, #45H
3MOV DPTR, #8245H
4ADD A, #10H

Explanation:

  • MOV A, #25H loads the accumulator with hexadecimal 25.
  • MOV DPTR, #8245H places a 16-bit constant into the DPTR register pair.2

Key features:

  • Fast and simple for loading constants.
  • No extra memory lookup is needed for the operand value.
  • Useful for initialization of registers, counters, masks, and fixed constants.

This mode is ideal when the programmer already knows the operand value at assembly time.

Footnotes

  1. [PDF] UNIT – 4 8051 MICROCONTROLLER Architecture - WordPress.com - Academic notes summarizing the main five 8051 addressing modes and examples. ↩ ↩2 ↩3

  2. [PDF] ADDRESSING MODES - Pondicherry Engineering College - Notes on immediate, direct, indirect, relative, absolute, long, and indexed addressing in 8051. ↩ ↩2

2. Register Addressing Mode

In register addressing, the operand is stored in one of the working registers such as R0 to R7, or in some cases accumulator-oriented registers like A or B depending on the instruction.2

Examples:

1MOV A, R5
2MOV R2, A
3ADD A, R1

Explanation:

  • MOV A, R5 copies the contents of register R5 into accumulator A.
  • ADD A, R1 adds the contents of R1 to the accumulator.2

Important points:

  • R0 to R7 belong to the currently selected register bank.
  • Register addressing is compact and efficient because registers are internal to the CPU.
  • It usually gives shorter and faster code than memory-based addressing.

This mode is preferred for temporary data and arithmetic operations.

Footnotes

  1. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩ ↩2

  2. Addressing modes of 8051 - TutorialsPoint - Provides concise descriptions and sample instructions for core 8051 addressing modes. ↩ ↩2 ↩3

  3. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

3. Direct Addressing Mode

In direct addressing, the instruction specifies the exact 8-bit address of the operand.2

Examples:

1MOV A, 30H
2MOV 40H, A
3MOV 90H, A

Explanation:

  • MOV A, 30H loads the accumulator with the byte stored at internal RAM address 30H.
  • MOV 40H, A stores the accumulator value into internal RAM location 40H.
  • Addresses from 80H to FFH can refer to SFRs in direct addressing.2

Characteristics:

  • Used for internal RAM locations and SFRs.
  • The address appears directly in the instruction.
  • Convenient for fixed variables and control registers.2

A major advantage is clarity: the programmer can directly access a known RAM or SFR location without using an intermediate pointer.

Footnotes

  1. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩ ↩2 ↩3

  2. [PDF] UNIT – 4 8051 MICROCONTROLLER Architecture - WordPress.com - Academic notes summarizing the main five 8051 addressing modes and examples. ↩ ↩2

  3. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

Common Confusion

In 8051 assembly, MOV A, #30H means load the constant 30H, while MOV A, 30H means load the byte stored at address 30H. The presence or absence of # completely changes the meaning.2

Footnotes

  1. [PDF] UNIT – 4 8051 MICROCONTROLLER Architecture - WordPress.com - Academic notes summarizing the main five 8051 addressing modes and examples. ↩

  2. [PDF] ADDRESSING MODES - Pondicherry Engineering College - Notes on immediate, direct, indirect, relative, absolute, long, and indexed addressing in 8051. ↩

4. Register Indirect Addressing Mode

In register indirect addressing the instruction refers to a register that contains the address of the data rather than the data itself.2

Examples:

1MOV A, @R0
2MOV @R1, A
3MOVX A, @DPTR
4MOVX @DPTR, A

Explanation:

  • In MOV A, @R0, the 8051 first reads the address stored in R0, then fetches the data from that RAM location into A.
  • Only R0 and R1 can be used for indirect addressing of internal RAM in classic 8051 instructions.2
  • External data memory access commonly uses MOVX with @DPTR or sometimes @R0/@R1 depending on the instruction form.2

Characteristics:

  • Useful for arrays, buffers, and pointer-based traversal.
  • More flexible than direct addressing because the effective address can change during execution.
  • Essential when looping through memory locations.2

This mode is analogous to pointer-based memory access in higher-level programming.

Footnotes

  1. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩ ↩2 ↩3

  2. Addressing modes of 8051 - TutorialsPoint - Provides concise descriptions and sample instructions for core 8051 addressing modes. ↩ ↩2

  3. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩ ↩2

  4. [PDF] ADDRESSING MODES - Pondicherry Engineering College - Notes on immediate, direct, indirect, relative, absolute, long, and indexed addressing in 8051. ↩

5. Indexed Addressing Mode

In indexed addressing, the 8051 forms the effective address by adding the accumulator value to either DPTR or PC.2

Examples:

1MOVC A, @A+DPTR
2MOVC A, @A+PC

Explanation:

  • MOVC means move from code memory.
  • In MOVC A, @A+DPTR, the effective address is calculated as: Effective Address=A+DPTR\text{Effective Address} = \text{A} + \text{DPTR}
  • In MOVC A, @A+PC, the effective address is based on the program counter plus accumulator offset.2

Uses:

  • Accessing lookup tables stored in program memory.
  • Character conversion, seven-segment code tables, sine tables, and encoded constant tables.

This mode is especially important because the 8051 frequently stores constant tables in code memory rather than internal RAM.

Footnotes

  1. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩ ↩2 ↩3

  2. Addressing modes of 8051 - TutorialsPoint - Provides concise descriptions and sample instructions for core 8051 addressing modes. ↩ ↩2

How to Identify an 8051 Addressing Mode from an Instruction

  1. 1
    Step 1

    If the operand is preceded by #, the instruction uses immediate addressing, meaning the data value is embedded in the instruction itself.2

    Footnotes

    1. [PDF] UNIT – 4 8051 MICROCONTROLLER Architecture - WordPress.com - Academic notes summarizing the main five 8051 addressing modes and examples. ↩

    2. [PDF] ADDRESSING MODES - Pondicherry Engineering College - Notes on immediate, direct, indirect, relative, absolute, long, and indexed addressing in 8051. ↩

  2. 2
    Step 2

    If the operand is R0 to R7, A, or another CPU register without @, it is register addressing.2

    Footnotes

    1. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩

    2. Addressing modes of 8051 - TutorialsPoint - Provides concise descriptions and sample instructions for core 8051 addressing modes. ↩

  3. 3
    Step 3

    If the operand is written as an address like 30H or 90H without # or @, it is direct addressing and usually refers to internal RAM or an SFR.2

    Footnotes

    1. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩

    2. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

  4. 4
    Step 4

    If the operand is written as @R0, @R1, or @DPTR, the address is being taken indirectly from a register.2

    Footnotes

    1. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

    2. Addressing modes of 8051 - TutorialsPoint - Provides concise descriptions and sample instructions for core 8051 addressing modes. ↩

  5. 5
    Step 5

    If the form is @A+DPTR or @A+PC, it is indexed addressing and is generally used with MOVC for code-memory table access.

    Footnotes

    1. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

Beyond operand-access modes, the 8051 instruction set also includes program branching modes: relative, absolute, and long.

Relative Addressing

In relative addressing, the target address is obtained by adding a signed 8-bit offset to the program counter. It is used in short jumps such as SJMP and conditional branches.

Example:

1SJMP LOOP
2JNZ NEXT

Range:

  • Approximately -128 to +127 bytes relative to the current PC.

Absolute Addressing

In absolute addressing the instruction supplies an 11-bit destination embedded in the opcode format for AJMP and ACALL.

Example:

1AJMP LABEL
2ACALL SUB1

Long Addressing

In long addressing the destination address is explicitly provided as a full 16-bit address, as in LJMP and LCALL.

Example:

1LJMP START
2LCALL DELAY

These are important when writing complete assembly programs, especially for code organization and subroutine calls.

Footnotes

  1. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩ ↩2 ↩3 ↩4 ↩5

1MOV A, #55H   ; load constant 55H into A
2MOV A, 55H    ; load data from RAM/SFR address 55H into A

7. Comparative Short Notes Table

The table below summarizes the major 8051 addressing modes in a compact examination-friendly form.4

Addressing ModeOperand SourceTypical SyntaxMain UseExample
ImmediateConstant inside instruction#dataLoad fixed valuesMOV A, #25H
RegisterCPU registerRnFast data manipulationMOV A, R2
DirectExplicit byte addressdirectAccess RAM/SFR directlyMOV A, 30H
Register IndirectAddress stored in register@R0, @R1, @DPTRPointer-based memory accessMOV A, @R0
IndexedBase + offset@A+DPTR, @A+PCTable lookup in code memoryMOVC A, @A+DPTR
RelativePC + signed offsetbranch labelShort jumpsSJMP LOOP
Absolute11-bit page targetbranch labelJump/call in 2 KB pageAJMP NEXT
LongFull 16-bit targetbranch labelJump/call anywhere in code memoryLJMP START

Footnotes

  1. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩

  2. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

  3. [PDF] UNIT – 4 8051 MICROCONTROLLER Architecture - WordPress.com - Academic notes summarizing the main five 8051 addressing modes and examples. ↩

  4. Addressing modes of 8051 - TutorialsPoint - Provides concise descriptions and sample instructions for core 8051 addressing modes. ↩

Conceptual Comparison of 8051 Addressing Modes

Relative conceptual flexibility for operand selection and memory reach

Important Clarifications and Exam FAQs

Memory Access Tip

Use direct addressing for fixed variables and SFR control, indirect addressing for arrays and buffers, and indexed addressing for lookup tables stored in program memory.2

Footnotes

  1. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩

  2. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

8. Conclusion

The various addressing modes of the 8051 microcontroller provide flexibility in accessing constants, registers, RAM locations, pointers, and code memory tables. The five principal data-access modes are immediate, register, direct, register indirect, and indexed, while relative, absolute, and long modes are used mainly for program branching.2 For short notes, a good answer should define each mode, give one example instruction, and mention its key application area such as constant loading, register operation, memory access, pointer traversal, or table lookup.2

Footnotes

  1. 8051 Instruction Set - Silicon Labs - Instruction-set overview including register, direct, indirect, immediate, relative, absolute, long, and indexed addressing. ↩

  2. [PDF] UNIT – 4 8051 MICROCONTROLLER Architecture - WordPress.com - Academic notes summarizing the main five 8051 addressing modes and examples. ↩

  3. 8051 Microcontroller Addressing Modes | JunctionByte - Explains immediate, register, direct, register indirect, and indexed modes with examples. ↩

  4. Addressing modes of 8051 - TutorialsPoint - Provides concise descriptions and sample instructions for core 8051 addressing modes. ↩

Knowledge Check

Question 1 of 5
Q1Single choice

Which 8051 addressing mode uses the # symbol before the operand?

Explore Related Topics

1

The Stack Pointer Points to the Top of Stack

The stack pointer (SP) is a CPU register that always identifies the current top of the stack—either the last used address or the next free slot—separate from the program counter, data registers, or I/O pointers.

  • SP tracks the active end of the stack, enabling push/pop, function calls, returns, and interrupt handling.
  • Architectures differ: some define SP as the address of the last stored item, others as the next free location, but both denote the stack’s top.
  • When the stack grows downward, a push is SP←SP−kSP \leftarrow SP - k followed by storing the value at SPSP, and a pop reads value←M[SP]value \leftarrow M[SP] then SP←SP+kSP \leftarrow SP + k.
  • The correct exam answer is (ii) Top of stack; it does not point to program memory, general data memory, or I/O ports.
2

Interfacing Stepper Motors: Architecture, Drivers, and Control

The course explains how stepper motors work, the differences between bipolar and unipolar designs, and how to drive them safely using dedicated driver ICs such as the A4988, with example code for microcontrollers.

  • Step angle is determined by rotor teeth and phases; a typical 1.8° motor yields 200 steps per revolution.
  • Unipolar motors use center‑tapped windings for simpler drivers but lower efficiency, while bipolar motors require H‑bridge drivers and provide higher torque‑to‑size.
  • Driving modes include wave (one phase), full‑step (two phases), and half‑step (alternating) to trade torque versus resolution.
  • Interfacing a bipolar motor to an A4988 involves correct coil identification, power decoupling, STEP/DIR wiring, optional microstepping pins, and Vref current‑limit calibration.
  • Sample Arduino C++ and Raspberry Pi Python sketches illustrate basic step‑and‑direction control, emphasizing the need for current‑limiting and back‑EMF protection.
3

Understanding Digital Counters: Principles, Types, and Applications

Digital counters are sequential circuits built from cascaded flip‑flops that count input events, with a maximum modulus of 2ᴺ for N stages, and are classified as asynchronous (ripple) or synchronous based on clock distribution.

  • Asynchronous counters cascade flip‑flop clocks, causing cumulative propagation delay and limiting maximum frequency.
  • Synchronous counters receive the clock simultaneously, using combinational logic to eliminate ripple delay and support higher speeds.
  • Designing a synchronous Mod‑6 counter involves defining the state sequence, creating excitation tables, simplifying with Karnaugh maps, and wiring JK flip‑flops with derived logic.
  • Ring counters yield N states; Johnson counters double this to 2N states.
  • Prevent glitches and lock‑out by using Gray‑code sequencing, output strobes, and ensuring unused states redirect to the main count sequence.
Research more with Coursify
Chat with Kiro